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An automated approach for generating and checking control logic for reversible hardware description language-based designs

Publikation: Bidrag til tidsskriftKonferenceartikelForskningfagfællebedømt

Although different from the conventional computing paradigm, reversible computation received significant interest due to its applications in various (emerging) technologies. Here, computations can be executed not only from the inputs to the outputs, but also in the reverse direction. This leads to significantly different design challenges to be addressed. In this work, we consider problems that occur when describing a reversible control flow using Hardware Description Languages (HDLs). Here, the commonly used conditional statements must, in addition to the established if-condition for forward computation, be provided with an additional fi-condition for backward computation. Unfortunately, deriving correct and consistent fi-conditions is often not obvious. Moreover, HDL descriptions exist which may not be realized with a reversible control flow at all. In this work, we propose automatic solutions, which generate the required and check whether a reversible control flow indeed can be realized. The solution utilizes predicate transformer semantics based on Hoare logic. This has exemplary been implemented for the reversible HDL SyReC and evaluated with a variety of circuit description examples. The proposed solution constitutes the first automatic method for these important designs steps in the domain of reversible circuit design.

OriginalsprogEngelsk
TidsskriftJournal of Low Power Electronics
Vol/bind13
Udgave nummer4
Sider (fra-til)633-641
Antal sider9
ISSN1546-1998
DOI
StatusUdgivet - dec. 2017
Begivenhed6th International Symposium on Embedded Computing and System Design - Patna, Indien
Varighed: 15 dec. 201617 dec. 2016
Konferencens nummer: 6

Konference

Konference6th International Symposium on Embedded Computing and System Design
Nummer6
LandIndien
ByPatna
Periode15/12/201617/12/2016

ID: 188360785